The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
The amount of information accessible via computer devices is constantly increasing. Accessing increasing amounts of information can be time-consuming for even the most advanced computer systems without systems and methods. There are often many translation layers between an application and the underlying storage memory, which may only take milliseconds to traverse, but millions and billions of data transactions, traversing such translation layers could add significant time delays.
U.S. Pat. No. 8,041,878 to Lee teaches a flash file system with a flash memory and a subsystem that interfaces between the flash memory and the host system. The host system writes data to a cache memory that temporarily holds data before writing. A flash translation layer unit in the subsystem maps a logical address received from the host system interface and the cache memory to a physical address of the flash memory. Lastly, a flash memory interface transfers data to the flash memory from the cache memory system based on the physical address. Lee's system, however, requires data to be translated several times: first by the host system when an application wishes to write data to memory, then by the flash translation layer. In addition, Lee's system requires the data to be copied twice: first to the cache memory, and then to the physical address. While such steps are necessary to maintain a layered infrastructure, taking such intermediary steps every time data needs to be transferred can be time-consuming.
U.S. Pat. No. 8,713,283 to Sinclair teaches a system for interfacing a system operating through logical address space with a direct file storage medium by generating file objects manageable by the direct file storage medium using logical block addresses. Data files generated by a host are identified to the memory system by file number and offsets of data within the file. Sinclair's memory system controller directly maps the files to the physical blocks of the memory cell array and maintains directory and index table information of the memory blocks into which host files are stored. By identifying host data by file objects instead of using logical addresses, Sinclair's memory system controller can store the data in a manner that reduces the need for frequent data consolidation and collection. Sinclair's system, however, still requires additional translation layers between the application and the physical data object in the form of a data file that is mapped to physical blocks of the memory cell array. Sinclair's system also maps all data files directly to physical blocks of the memory cell array, and does not allow the data files to be mapped to logical blocks as well as physical blocks.
Thus, there remains a need for a system and method to improve the manner in which data is accessed by an application.